Download 60-GHz CMOS Phase-Locked Loops by Hammad M. Cheema, Reza Mahmoudi, Arthur H.M. van Roermund PDF
By Hammad M. Cheema, Reza Mahmoudi, Arthur H.M. van Roermund
The promising excessive info expense instant purposes at millimeter wave frequencies more often than not and 60 GHz particularly have received a lot cognizance in recent times. even if, demanding situations concerning circuit, format and measurements in the course of mm-wave CMOS IC layout need to be conquer prior to they could turn into possible for mass market.60-GHz CMOS Phase-Locked Loops targeting phase-locked loops for 60 GHz instant transceivers elaborates those demanding situations and proposes recommendations for them. The approach point layout to circuit point implementation of the total PLL, in addition to separate implementations of person elements akin to voltage managed oscillators, injection locked frequency dividers and their combos, are incorporated. moreover, to meet a couple of transceiver topologies concurrently, flexibility is brought within the PLL structure by utilizing new dual-mode ILFDs and switchable VCOs, whereas reusing the low frequency parts on the similar time.
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Additional info for 60-GHz CMOS Phase-Locked Loops
3. 1 Layout Problems and Solutions The intermediate step between schematic-level design and actual fabrication of integrated circuits is the layout of active and passive components. Layouting primarily involves connecting these components using conductive metal called interconnect. The low frequency circuit theory techniques (KCL, KVL) treats the circuit elements and interconnects as lumped elements which is only valid if the dimensions of the circuit are small compared to the shortest wavelength of interest.
Secondly, to ensure loop stability oc (or fc) should be a fraction of the reference frequency. This is treated in sufficient detail in  which estimates a condition of fref/10 > fc for loop stability. Lastly, oc affects the noise transfer characteristic of the PLL and defines the “knee” in the overall phase noise curve. 6. Having selected a fref ¼ 300 MHz, the above mentioned stability bound is satisfied (with some margin) by selecting a loop bandwidth of fc ¼ 4 MHz. This value also results in reasonably valued loop filter components which can be integrated on-chip.
If this inductance is unaccounted in a 60 GHz oscillator it can shift the center frequency by 40 3 Layout and Measurements at mm-Wave Frequencies 160 120 100 80 60 40 120 100 80 60 40 20 0 Me1 at 60 GHz Me6 at 60 GHz 140 Inductance (pH) Inductance (pH) 160 Me1 at 40 GHz Me6 at 40 GHz 140 20 5 15 35 50 65 80 Length (mm) 0 95 120 5 15 35 50 65 80 Length (mm) 95 120 Fig. 3 Interconnect inductance for lowest metal (Me1) and highest metal (Me6) as a function of length at 40 GHz (left) and 60 GHz (right) a b G S S G G G c G d S G S G G S G S G Fig.